S7-300 I/O刷新 点击:612 | 回复:4



有道之士

    
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发表于:2004-12-02 15:30:00
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请问,S7-300 CPU313C用什么方法或指令能在一个扫描周期内对指定i/o进行多次刷新,且速度最快!!



millmeng

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发表于:2004-12-02 23:03:00
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立即读immediate read(WAND_W),

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发表于:2004-12-03 10:05:00
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可是我没发现300的指令集里有这样的指令

millmeng

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发表于:2004-12-06 21:39:00
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中文版<S7-300和S7-400梯形逻辑编程> 1-15页到1-16页

millmeng

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发表于:2004-12-07 00:33:00
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找不到中文电子板,先给出英文的. 1.17 Immediate Read Description For the Immediate Read function, a network of symbols must be created as shown in the example below. For time-critical applications, the current state of a digital input may be read faster than the normal case of once per OB1 scan cycle. An Immediate Read gets the state of a digital input from an input module at the time the Immediate Read rung is scanned. Otherwise, you must wait for the end of the next OB1 scan cycle when the I memory area is updated with the P memory state. To perform an immediate read of an input (or inputs) from an input module, use the peripheral input (PI) memory area instead of the input (I) memory area. The peripheral input memory area can be read as a byte, a word, or a double word. Therefore, a single digital input cannot be read via a contact (bit) element. To conditionally pass voltage depending on the status of an immediate input: 1. A word of PI memory that contains the input data of concern is read by the CPU. 2. The word of PI memory is then ANDed with a constant that yields a non-zero result if the input bit is on ("1"). 3. The accumulator is tested for non-zero condition. Bit Logic Instructions Ladder Logic (LAD) for S7-300 and S7-400 Programming 1-22 A5E00171231-01 Example Ladder Network with Immediate Read of Peripheral Input I1.1
* MWx has to be specified in order to be able to store the network. x may be any permitted number. Description of WAND_W instruction: PIW1 0000000000101010 W#16#0002 0000000000000010 Result 0000000000000010 In this example immediate input I1.1 is in series with I4.1 and I4.5. The word PIW1 contains the immediate status of I1.1. PIW1 is ANDed with W#16#0002. The result is not equal to zero if I1.1 (second bit) in PB1 is true ("1"). The contact A<>0 passes voltage if the result of the WAND_W instruction is not equal to zero. Bit Logic Instructions Ladder Logic (LAD) for S7-300 and S7-400 Programming A5E00171231-01 1-23 1.18 Immediate Write Description For the Immediate Write function, a network of symbols must be created as shown in the example below. For time-critical applications, the current state of a digital output may have to be sent to an output module faster than the normal case of once at the end of the OB1 scan cycle. An Immediate Write writes to a digital output to a input module at the time the Immediate Write rung is scanned. Otherwise, you must wait for the end of the next OB1 scan cycle when the Q memory area is updated with the P memory state. To perform an immediate write of an output (or outputs) to an output module, use the peripheral output (PQ) memory area instead of the output (Q) memory area. The peripheral output memory area can be read as a byte, a word, or a double word. Therefore, a single digital output cannot be updated via a coil element. To write the state of a digital output to an output module immediately, a byte, word, or double word of Q memory that contains the relevant bit is conditionally copied to the corresponding PQ memory (direct output module addresses). ! Caution Since the entire byte of Q memory is written to an output module, all outputs bits in that byte are updated when the immediate output is performed. If an output bit has intermediate states (1/0) occurring throughout the program that should not be sent to the output module, Immediate Writes could cause dangerous conditions (transient pulses at outputs) to occur. As a general design rule, an external output module should only be referenced once in a program as a coil. If you follow this design rule, most potential problems with immediate outputs can be avoided. Bit Logic Instructions Example Ladder network equivalent of Immediate Write to peripheral digital output module 5, channel 1. The bit states of the addressed output Q byte (QB5) are either modified or left unchanged. Q5.1 is assigned the signal state of I0.1 in network 1. QB5 is copied to the corresponding direct peripheral output memory area (PQB5). The word PIW1 contains the immediate status of I1.1. PIW1 is ANDed with W#16#0002. The result is not equal to zero if I1.1 (second bit) in PB1 is true ("1"). The contact A<>0 passes voltage if the result of the WAND_W instruction is not equal to zero.
In this example Q5.1 is the desired immediate output bit. The byte PQB5 contains the immediate output status of the bit Q5.1. The other 7 bits in PQB5 are also updated by the MOVE (copy) instruction.

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